Alientek DNRP2350AM Development Board Documentation

The ESP32-S3 features a built-in 52-bit system timer used for OS tick interrupts and general-purpose periodic or one-shot delay interrupts.

Hardware Architecture:

• Counters: Two 52-bit counters (UNIT0 and UNIT1) using a 40MHz XTAL_CLK source. The actual average frequency (CNT_CLK) is 16MHz, meaning the counter increments by 1/16µs every cycle (1µs every 16 cycles).
• Comparators: Three 52-bit comparators (COMP0, COMP1, COMP2) that monitor counter values and trigger alarm interrupts when a match is found.
• Control: Counters are managed via the SYSTIMER_CONF_REG register, specifically using bits for work enable and core stall enable (SYSTIMER_TIMER_UNITn_WORK_EN, SYSTIMER_TIMER_UNITn_CORE0_STALL_EN, and SYSTIMER_TIMER_UNITn_CORE1_STALL_EN).

The AW9523B is a 24-pin CMOS device that provides 16 general-purpose input/output (GPIO) ports and breathing light driver functions via an I2C interface. It is used to expand the I/O resources of a microcontroller. Key specifications include:

• Voltage Range: 2.4V to 5.5V
• Interface: 400kHz Fast-mode I2C (compatible with 1.8V levels)
• LED Driving: 16-channel common-anode constant current LED drivers with 256-level linear dimming
• Interrupts: Open-drain INTN pin that triggers on input state changes
• Reset: Hardware RSTN pin with built-in 10μs debounce
• Addressing: 2-bit address selection (AD1/AD0), allowing up to 4 devices on a single bus

The RP2350A features two system timer instances, TIMER0 and TIMER1, which provide a microsecond-level time base for the system. These timers can be deployed in different security domains.

Key technical specifications:

• Counter Architecture: 64-bit counter, incrementing every microsecond.
• Register Access: Uses a pair of latch registers to ensure contention-free reading via a 32-bit bus.
• Interrupts: 4 independent alarms that trigger an IRQ when the counter's lower 32 bits match the alarm value.

The STM32N647 features a variety of independent timers that do not share resources. The available timers include:

• 3 Basic Timers: TIM6, TIM7, TIM18
• 13 General Purpose Timers: TIM2-TIM5, TIM9-TIM17
• 2 Advanced Control Timers: TIM1, TIM8
• 5 Low Power Timers: LPTIM1-LPTIM5

The Image class is the fundamental object for machine vision processing in CanMV. It supports creating image objects from various memory regions including Micropython GC, MMZ, system heap, and VB areas. It also allows creating images by referencing external memory (ALLOC_REF).

Supported image formats:

• BINARY, GRAYSCALE, RGB565, BAYER, YUV422, JPEG, PNG, ARGB8888, RGB888, RGBP888, YUV420

Supported memory allocation areas:

• ALLOC_MPGC: Micropython managed memory
• ALLOC_HEAP: System heap memory
• ALLOC_MMZ: Multimedia memory
• ALLOC_VB: Video buffer
• ALLOC_REF: Reference to existing memory (no new allocation)

The ES7210 is a high-performance four-channel audio analog-to-digital converter (ADC) using a multi-bit Δ-Σ architecture. It is designed for high-fidelity audio capture in applications like microphone arrays and smart speakers.

Key technical specifications:

• Signal-to-Noise Ratio (SNR): Up to 102dB
• Total Harmonic Distortion + Noise (THD+N): -85dB
• Resolution: Supports 24-bit
• Sampling Rate: 8kHz to 100kHz
• Interfaces: I²S/PCM (Master/Slave) and TDM
• Clock Compatibility: 256/384Fs, USB 12/24MHz
• Package: QFN-32
• Operating Temperature: -40°C to +85°C

TuyaOpen supports three types of storage devices with different file systems:

• Internal Flash: Uses LittleFS
• External QSPI Flash: Uses LittleFS
• SD Card: Uses FatFS

The Alientek I.MX6ULL core board is designed for embedded Linux applications based on the NXP MCIMX6Y2CVM08AB MPU.

Key hardware specifications include:

• CPU: ARM Cortex-A7, max frequency 800MHz
• RAM Support: 16-bit LPDDR2, DDR3, and DDR3L
• Flash Support: NAND Flash, eMMC
• Peripherals: I2C, SPI, CAN, NET, UART, ADC, SAI