Avaota SBC Documentation
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https://docs.avaota.funTechnical documentation for Avaota Single Board Computers, including the Avaota A1 (Allwinner T527) and Avaota C1 (Allwinner H618). Covers hardware specifications, OSHW documentation, and comprehensive guides for Android 13 and Buildroot development, including kernel compilation, SDK management, flashing firmware, and GPIO/sensor configuration.
What's inside Avaota
- The Android kernel uses a specific SDK called the 'longan' system. The longan system must be compiled first to produce the necessary kernel files required for the Android build process.
Overview of SyterKit Framework
SyterKit is a bare-metal development framework that runs in the chip's SRAM as a first-stage program booted by BROM. It is designed for bare-metal core development and operating system booting, supporting FreeRTOS, RT-Thread, OpenSBI, U-Boot, and the Linux kernel. It provides a basic class library and a streamlined libc to maximize functionality within limited SRAM.Overview of Allwinner IR TX Module
The IR-TX module outputs infrared waveforms, typically using a 38KHz carrier frequency. It converts data into high/low level sequences. Data is buffered in the TX FIFO as bytes where:
- Bit 7: Polarity (1 = High level, 0 = Low level).
- Bits [6:0]: Waveform length in reference clock cycles (Ts = Fclk / RCS).
Fclk is the clock source frequency, and RCS is the reference clock division coefficient, configurable via bits [3:1] of the TCR register (address 0x08).
Overview of Avaota Hyper Card Reader
The Avaota Hyper Card Reader is designed to solve the problem of frequent physical disconnection and reconnection of card readers when flashing systems during embedded development. It allows users to switch between a USB connection to a computer (for fast flashing and data transfer) and a connection to a development board using a simple button operation.
Key hardware components include:
- TS3DV642A0RUAR Multiplexer: Manages the connection path switching.
- GL823K-HCY04 Chip: Provides compatibility for various storage cards and external devices.
- STC8G1K08-36I-DFN8 MCU: Acts as the control core to manage MUX switching based on button triggers.
Overview of Buildroot for Embedded Linux Development
Buildroot is a highly customizable and modular build system used to create embedded Linux systems. It is designed to generate a complete bootable image consisting of a toolchain, a kernel, and a root filesystem. It is particularly useful for resource-constrained environments where a lightweight and efficient system is required.Overview of the Crypto Engine (CE) Architecture
The Crypto Engine (CE) is a Linux kernel subsystem (located in
kernel/crypto) that provides a unified management framework and data processing interface for cryptographic algorithms, including symmetric/asymmetric encryption, authentication, hashing, HMAC, pseudo-random number generation, and compression.There are two primary ways to access CE functionality from user space:
- Via OpenSSL: Uses the standard OpenSSL interface. To communicate with the kernel Crypto framework, an
af_algengine plugin must be registered in OpenSSL and configured in the application. - Via CE Device Nodes: A direct path that bypasses the Crypto framework and OpenSSL, suitable for memory-constrained environments where the OpenSSL library is too large.
- Via OpenSSL: Uses the standard OpenSSL interface. To communicate with the kernel Crypto framework, an
Overview of WS2812 RGB LED support on Avaota SBC
Avaota SBCs use the LEDC (Light Emitting Diode Controller) to drive WS2812 RGB LEDs. Each LED supports 256 levels of brightness for each of the three primary colors (R, G, B), allowing for 16,777,216 colors. The module supports cascading up to 1024 externally controlled LEDs. Data is passed through the LEDs in a chain: each LED consumes 24 bits of data (8 bits per color) and forwards the remaining data to the next LED in the sequence.Overview of the CCU Clock Management Module
The Clock Control Unit (CCU) is a management framework in the Linux system used to unify the control of hardware clocks. It is responsible for adjusting the operating frequency of hardware modules and managing power switching. In the Allwinner (sunxi) platform, the clk driver also integrates reset functionality, allowing drivers to ensure hardware is properly reset before configuration. The system utilizes various clock sources including 32k (LOSC), 16M (IOSC), and 24M (HOSC), with Phase-Locked Loops (PLLs) used to generate higher frequencies for specific hardware groups.Overview of the Avaota Hyper Card hardware suite
The Avaota Hyper Card series is a development kit designed to streamline embedded system development. The suite includes the following components:
- Avaota Hyper Card Reader: A specialized reader for firmware flashing and data exchange.
- Avaota Hyper Card CKLink: A high-performance debugger.
- Avaota Hyper Card Dual Connector: A flexible dual-port connector.
- Avaota IP Camera Connector: A specialized connector for heterogeneous multi-core devices.
Overview of Allwinner TWI (I2C) Capabilities
The TWI bus is compatible with the I2C protocol, supporting standard communication rates of 100kbps and high-speed rates up to 400kbps. Key features include:
- Support for both Master and Slave modes.
- DMA transfer support in Master mode.
- Bus arbitration for multi-master configurations.
- Clock synchronization, bit and byte waiting in Master mode.
- Address detection interrupts in Slave mode.
- Support for both 7-bit and 10-bit slave addresses.
- Support for standard I2C protocol and custom transmission modes.
Overview of MSGBOX Heterogeneous Communication
MSGBOX is used for communication between multiple CPUs within a single IC. It is specifically designed for environments where different cores run different architectures or operating systems. The system utilizes a dual-end FIFO structure where one CPU writes to one end and another CPU reads from the other. It provides an interrupt-based communication mechanism for on-chip processors.Overview of Kodbox (可道云) NAS
Kodbox (可道云) is an open-source, PHP-based file management system used to build a simple NAS. It provides a web-based interface for remote server file operations, supporting multi-user roles, flexible access permissions, and a wide range of file management features including multi-chunk uploads, file tree navigation, and previews for images, PDFs, and documents.