Understand `crc32fast` performance and SIMD acceleration
masterThe crate automatically selects the most optimal CRC32 implementation for your CPU at runtime when calling Hasher::new(). Supported accelerations include:
- Baseline: A fast implementation processing up to 16 bytes per iteration.
- x86 (SSE/PCLMULQDQ): Optimized using
sseandpclmulqdqinstructions. - x86 (AVX2/AVX512): Wider implementations using
vpclmulqdqon 256-bit (avx2) and 512-bit (avx512f) registers (requires Rust 1.89+). - AArch64: Optimized using
crc32instructions, including a 3-way interleaved variant to hide instruction latency on large inputs.