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rust-embedded/riscv

repository·master·Indexed 22 days ago

https://github.com/rust-embedded/riscv

A collection of specialized Rust crates for developing software on RISC-V microcontrollers. The ecosystem includes the riscv crate for low-level CPU register and intrinsic access, riscv-rt for runtime startup and interrupt management, riscv-peripheral for standard peripheral interfaces, riscv-semihosting for debugging I/O, riscv-target-parser for build script target parsing, and riscv-types for common PAC traits. It also provides riscv-macros for procedural macros such as #[entry], #[exception], and #[core_interrupt].

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What's inside riscv

  3. Overview of riscv-types

    master
    The riscv-types crate (formerly known as riscv-pac) provides target-specific traits designed to be implemented by Peripheral Access Crates (PACs). It serves as a foundational layer for defining common interfaces across different RISC-V hardware implementations.

  4. Overview of RISC-V crates

    master

    This repository provides a collection of crates designed for developing Rust applications on RISC-V microcontrollers. Depending on your requirements, you may need one or more of the following crates:

    • riscv: Provides access to CPU registers and intrinsics.
    • riscv-peripheral: Provides interfaces for standard RISC-V peripherals.
    • riscv-rt: Handles startup code and interrupt management.
    • riscv-semihosting: Enables semihosting for RISC-V processors (useful for debugging/I/O via a debugger).
    • riscv-target-parser: A utility for parsing RISC-V targets, typically used within build scripts.
    • riscv-types: Defines common traits intended to be implemented by RISC-V Peripheral Access Crates (PACs).

  5. Overview of the `riscv` crate

    master
    The riscv crate provides low-level access to RISC-V processors. It is part of the rust-embedded ecosystem and is maintained by the RISC-V team. It is intended for developers working on embedded systems that require direct interaction with RISC-V hardware features.

  7. Use `riscv-rt` as a minimal runtime for RISC-V CPUs

    master
    riscv-rt provides a minimal runtime and startup sequence for RISC-V microcontrollers. It is designed to handle the initial boot process, setting up the stack and environment before handing control over to your application's entry point.

  8. Check Minimum Supported Rust Version (MSRV) for riscv-types

    master
    When using riscv-types, ensure your toolchain meets the minimum requirements. The crate is guaranteed to compile on stable Rust 1.81 and up. While it may compile on older versions, this is not guaranteed for new patch releases.

  10. Check Minimum Supported Rust Version (MSRV) for riscv-peripheral

    master
    When using riscv-peripheral, ensure your toolchain meets the Minimum Supported Rust Version (MSRV). This crate is guaranteed to compile on stable Rust 1.81 and up. While it may compile on older versions, this is not guaranteed for future releases.

  11. Check Minimum Supported Rust Version (MSRV) for riscv-target-parser

    master
    When integrating riscv-target-parser into your project, ensure your toolchain meets the minimum requirements. The crate is guaranteed to compile on stable Rust 1.61 and up. While it may compile on older versions, this is not guaranteed for future releases.