Overview of Parthenon Framework
developParthenon is a performance-portable, block-structured Adaptive Mesh Refinement (AMR) framework. It is designed to minimize host-device overhead and maximize performance on modern hardware through several key architectural choices:
- Device-Resident Approach: Data is kept in device memory whenever possible to prevent expensive host-to-device transfers.
- Data Packing: Transparently packs data across blocks to reduce and hide kernel launch latency.
- Asynchronous Communication: Supports direct device-to-device communication via asynchronous MPI.
- Abstraction Layer: Provides an intermediate layer to simplify the complexity of device kernel launches.
- Extensibility: Features a flexible, plug-in package system.
- Flexible Data Models: Supports particles as well as cell-, node-, face-, and edge-centered fields.
- Metadata Control: Abstract variables are controlled via metadata flags.
- Parallelism: Uses multi-stage drivers/integrators with support for task-based parallelism.