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https://github.com/esp-rs/esp-halA bare-metal (no_std) hardware abstraction layer for Espressif ESP32 series microcontrollers, providing a Rust interface for direct hardware access. The repository includes related crates such as esp-alloc for heap allocation, esp-backtrace for panic handling, esp-lp-hal for low-power RISC-V coprocessors, and esp-println for logging. It supports a wide range of chips including ESP32, ESP32-C, ESP32-S, and ESP32-H series across Xtensa and RISC-V targets.
esp-lp-hal is a bare-metal (no_std) hardware abstraction layer (HAL) designed for the low-power RISC-V coprocessors found in Espressif chips. It implements various blocking and async traits from the embedded-hal ecosystem, allowing for standardized hardware interaction on these specific coprocessors.
For detailed getting started instructions, refer to The Rust on ESP Book or the official documentation.
esp-bootloader-esp-idf provides additional support for the ESP-IDF 2nd stage bootloader. It is designed for use in ESP32 development environments where the ESP-IDF bootloader is utilized.
The crate is guaranteed to compile with the latest stable Rust version available at the time of its release. While it may work with older versions, this is not guaranteed for future releases or patches.
esp-alloc is a simple no_std heap allocator designed for RISC-V and Xtensa processors from Espressif. It is intended for use on ESP32 devices to provide heap allocation capabilities in bare-metal environments.esp-sync is a crate that provides an optimized raw mutex for ESP32 devices. Unlike standard mutexes that wrap a data type, this is a raw lock type, meaning it does not own or wrap any data, allowing for more flexible low-level synchronization in bare-metal ESP32 environments.esp-hal is a bare-metal (no_std) hardware abstraction layer (HAL) for Espressif devices. It provides a consistent Rust interface for interacting with various ESP32 series microcontrollers.
Support for programming the low-power RISC-V cores found in the ESP32-C6, ESP32-S2, and ESP32-S3 is provided via the esp-lp-hal package.
esp-radio-rtos-driver crate provides the interface required to create task schedulers for the esp-radio crate. It is designed to facilitate radio-related task scheduling within an RTOS environment for ESP32 devices.esp-phy crate provides the implementation for PHY (Physical Layer) initialization handling specifically for ESP32 devices. It is used to manage the low-level hardware initialization required for radio or physical layer components in the ESP32 ecosystem.esp-rtos is a Real-Time Operating System (RTOS) implementation designed specifically for esp-hal. It provides the essential runtime environment required to execute async code on ESP32 hardware. Additionally, it implements core RTOS capabilities such as threads and queues, which are required by esp-radio.esp-hal-procmacros provides procedural macros designed for use with esp-hal and other related Espressif Rust ecosystem packages. These macros help automate code generation and simplify working with the hardware abstraction layer.The xtensa-lx-rt crate provides a minimal runtime and startup for Xtensa LX processors. It supports the following CPUs via specific features:
| Feature | Supported CPUs |
|---|---|
esp32 | ESP32 (LX6) |
esp32s2 | ESP32-S2 (LX7) |
esp32s3 | ESP32-S3 (LX7) |
The xtensa-lx crate provides low-level access to Xtensa LX processors. It is designed for developers working with Espressif's Xtensa-based microcontrollers who need direct hardware interaction at the processor level.
For detailed API documentation, visit the official Espressif documentation.
esp-riscv-rt crate provides a minimal runtime and startup sequence for Espressif RISC-V based microcontrollers. It builds upon the rust-embedded/riscv crate and includes custom code necessary for the specific requirements of Espressif hardware. Use this crate when developing bare-metal Rust applications for RISC-V ESP32 series chips to ensure proper initialization of the device before entering the main application logic.