Capstone Disassembly Framework

repository·master·Indexed 43 days ago

https://github.com/capstone-rust/capstone-rs

High-performance disassembly framework for binary analysis and reverse engineering. Provides high-level Rust bindings (version 0.14.0) and a clean, architecture-neutral API supporting ARM, ARM64, BPF, Mips, RISC-V, SystemZ, x86, and others. Features include deep instruction details, thread-safety, and native support for Windows, macOS, Linux, iOS, and Android.

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What's inside Capstone

  1. Overview of Capstone disassembly framework

    master

    Capstone is a high-performance disassembly framework designed for binary analysis and reversing.

    Key Features:

    • Multi-Architecture Support: ARM, ARM64 (ARMv8), Mips, PPC, Sparc, SystemZ, XCore, and X86 (including X86_64).
    • Detailed Instruction Analysis: Provides details on disassembled instructions and instruction semantics (e.g., lists of implicit registers read and written).
    • Cross-Platform: Native support for Windows, Mac OSX, iOS, Android, Linux, *BSD, Solaris, etc.
    • Design: Thread-safe, lightweight, and implemented in pure C with wrappers for multiple languages (Python, C++, C#, Go, Java, NodeJS, etc.).
    • Security Focused: High performance and capable of handling various X86 malware tricks.
  2. Overview of capstone-rs

    master
    capstone-rs provides Rust bindings to the Capstone disassembly framework. The primary interface for interacting with the library is the Capstone struct, which allows you to configure architecture, mode, syntax, and detail levels to disassemble machine code into human-readable instructions.
  3. Overview of Capstone Engine

    master

    Capstone is a high-performance disassembly framework designed for binary analysis and reverse engineering. It provides a clean, architecture-neutral API and is thread-safe by design.

    Key features include:

    • Multi-architecture support: ARM, ARM64 (ARMv8), BPF, Ethereum VM, M68K, M680X, Mips, MOS65XX, PPC, RISC-V (rv32G/rv64G), SH, Sparc, SystemZ, TMS320C64X, TriCore, Webassembly, XCore, and X86 (16, 32, 64).
    • Instruction Details: Provides deep details on disassembled instructions and instruction semantics (e.g., lists of implicit registers read and written).
    • Platform Support: Native support for Windows, Mac OSX, iOS, Android, Linux, *BSD, and Solaris.
    • Specialized Use Cases: High performance suitable for malware analysis and special support for embedding into firmware or OS kernels.
  4. Use Capstone Disassembly Engine with VB6

    master

    This project provides VB6 bindings for the Capstone disassembly engine via a C-based shim (vbCapstone.dll). It allows VB6 applications to perform basic disassembly across all processor architectures supported by Capstone.

    Limitations:

    • Full instruction details are currently only supported for the x86 processor family.
    • The shim is written in C and provides a stdcall API to bridge VB6 to the Capstone engine.

    Compatibility Note: This sample was built against Capstone 3.0 rc4. If the underlying Capstone structures change, the VB6 code must be adjusted to match the new definitions.

  5. Use the Xcode project for Capstone

    master

    The Capstone.xcodeproj project allows you to build Capstone within an Xcode workspace. The project contains 13 targets, with the two primary targets for library generation being:

    • CapstoneStatic: Produces libcapstone.a (a static library).
    • CapstoneDynamic: Produces libcapstone.dylib (a shared library).

    Other targets include various test suites (e.g., test, test_arm, test_arm64, test_mips, etc.) for verifying different architectures and configurations.

  6. Update SystemZ tables using LLVM

    master

    To update SystemZ tables, you must use LLVM's tablegen tool to generate .inc files. This process involves checking out a specific LLVM commit, applying patches, building the LLVM target, and then synchronizing the generated files with the Capstone architecture directory.

    Prerequisites

    • Patches are tested on LLVM commit c13d5969^ because this commit introduced changes to the decode table format.

    Workflow

    1. Checkout LLVM: Use the specific commit mentioned above.
    2. Apply Patches: Apply the patches located in the current directory to the LLVM source.
    3. Run Tablegen: Build the SystemZCommonTableGen target using CMake.
    4. Sync Files: Copy the generated .inc files from the LLVM build directory to arch/SystemZ/.
    5. Fixup Mapping Files: Use comm to reconcile differences in SystemZGenInsnNameMaps.inc to ensure instruction name maps are correctly updated.
    # 1. Build LLVM target
    cd $LLVM
    mkdir build
    cd build
    cmake -DCMAKE_CXX_FLAGS=-DCAPSTONE ..
    make SystemZCommonTableGen -j$(getconf _NPROCESSORS_ONLN)
    
    # 2. Copy .inc files
    cp arch/SystemZ/SystemZGenInsnNameMaps.inc \
       arch/SystemZ/SystemZGenInsnNameMaps.inc.old
    for inc in $(cd arch/SystemZ && ls *.inc); do
      cp $LLVM/build/lib/Target/SystemZ/$inc arch/SystemZ/
    done
    
    # 3. Fixup SystemZGenInsnNameMaps.inc
    comm -1 -3 \
        <(grep SYSZ_INS_ <arch/SystemZ/SystemZGenInsnNameMaps.inc.old \
          | sort -u) \
        <(grep SYSZ_INS_ <arch/SystemZ/SystemZGenInsnNameMaps.inc \
          | sort -u) \
        >arch/SystemZ/SystemZGenInsnNameMaps.inc.new
    cat arch/SystemZ/SystemZGenInsnNameMaps.inc.old \
        arch/SystemZ/SystemZGenInsnNameMaps.inc.new \
        >arch/SystemZ/SystemZGenInsnNameMaps.inc
  7. Requirements for capstone-rs

    master

    To use capstone-rs, ensure you meet the following requirements:

    • Rust Version: Minimum 1.81.0.
    • Low-level Bindings: The crate relies on capstone-sys for low-level C bindings. Check the capstone-sys documentation for specific platform requirements and supported operating systems.