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CMSIS (Cortex Microcontroller Software Interface Standard) Version 6

repository·main·Indexed 19 days ago

https://github.com/arm-software/cmsis_6

A standardized software interface for Arm Cortex-M and Armv8-M processors. CMSIS 6 provides core APIs, RTOS layers, and specialized libraries for DSP and Neural Networks. It includes CMSIS-Core for Cortex-A and Cortex-M, CMSIS-Compiler for I/O retargeting, and a validation suite supporting toolchains such as Arm Compiler 6, GCC, and Clang across various Cortex-M and Cortex-A devices.

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What's inside CMSIS 6

  1. Overview of CMSIS-Toolbox

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    The CMSIS-Toolbox is a set of command-line utilities developed as part of the Open-CMSIS-Pack project. It unifies development flows across multiple embedded toolchains (Arm, GCC, IAR, and LLVM) and is designed for both standalone use and integration into IDEs (like VS Code) or CI/CD pipelines.

    It provides two primary capabilities:

    1. Application Development: Project creation and building of embedded applications using Software Packs.
    2. Pack Management: Creation, maintenance, and distribution of software components using the CMSIS-Pack format.

  2. Overview of CMSIS-Core (Cortex-A)

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    CMSIS-Core (Cortex-A) provides a basic run-time system for Cortex-A devices, offering standardized access to the processor core and device peripherals. It serves as a Hardware Abstraction Layer (HAL) and provides several key features for software portability and system initialization:

    • Hardware Abstraction Layer (HAL): Standardized definitions for Cortex-A processor registers, including GIC (Generic Interrupt Controller), FPU, MMU, Cache, and core access functions.
    • System Exception Interface: Standardized system exception names to ensure compatibility across different devices.
    • Standardized Initialization: Provides methods for system initialization, such as the SystemInit() function used by MCU vendors to configure the device clock system.
    • Intrinsic Functions: Provides C-level functions that map directly to specific CPU instructions not supported by standard C.
    • System Clock Management: Includes a variable to determine the system clock frequency, which simplifies the configuration of system timers.
    • Organized Header Files: Uses specific naming conventions for device-specific interrupts and header organization to improve portability and ease of use for new Cortex-A products.

  3. Overview of CMSIS-Core (Cortex-M)

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    CMSIS-Core (Cortex-M) provides a basic run-time system for Arm Cortex-M devices, enabling access to the processor core and device peripherals. It serves as a Hardware Abstraction Layer (HAL) and standardizes several key components:

    • Hardware Abstraction Layer (HAL): Standardized definitions for Cortex-M processor registers, including SysTick, NVIC, System Control Block (SCB), MPU, and FPU registers, along with core access functions.
    • System Exception Interface: Standardized system exception names to ensure compatibility across different devices.
    • Software Portability: Standardized header file organization and naming conventions for device-specific interrupts to simplify moving between different Cortex-M microcontrollers.
    • System Initialization: Standardized methods like the SystemInit() function, which is used by MCU vendors to configure device-specific clock systems.
    • Intrinsic Functions: Specialized functions used to generate CPU instructions that are not supported by standard C.
    • System Clock Management: Provides a variable to determine the system clock frequency, which simplifies the configuration of the SysTick timer.

  4. What is CMSIS-NN

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    CMSIS-NN is an open-source software library providing efficient neural network (NN) kernels optimized for Arm Cortex-M processors. It aims to maximize performance and minimize the memory footprint of neural networks.

    The library automatically selects the optimal implementation at compile time based on the target processor's architectural features, including:

    • SIMD capability (e.g., Cortex-M0)
    • DSP extension (e.g., Cortex-M4)
    • Arm M-Profile Vector Extension (MVE) (e.g., Cortex-M55)

  5. Overview of CMSIS-View components

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    CMSIS-View provides methodologies and utilities to analyze the operation of embedded software on Arm Cortex-M processors. It consists of three primary elements:

    1. Event Recorder: An embedded software component used to annotate events within your code.
    2. Exception Fault Analysis: A set of functions designed to store, record, and analyze exception fault information.
    3. eventlist: A command-line tool used to process log files generated by the Event Recorder.

    CMSIS-View is designed for minimal memory and timing overhead, is compiler-agnostic, and provides accurate timestamps for captured events.

  6. What is CMSIS-Zone and its core capabilities

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    CMSIS-Zone is an open source utility designed to manage software configurations for partitions with varying access permissions to system resources in Arm Cortex-M devices. It provides the infrastructure required to automate the setup of hardware protection mechanisms and system views.

    Core capabilities include:

    • System Partitioning: Splitting multi-processor systems into single-processor views.
    • TrustZone Configuration: Setting up the Security Attribution Unit (SAU) and assigning interrupts to Secure or Non-Secure states.
    • Memory Protection: Configuring the Memory Protection Unit (MPU) and device-specific Memory Protection Controllers (MPC).
    • Peripheral Protection: Configuring device-specific Peripheral Protection Controllers (PPC).

  7. Overview of CMSIS Components

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    CMSIS (Common Microcontroller Software Interface Standard) is organized into several categories of software components, tools, and specifications designed to simplify microcontroller development.

    CMSIS Base Software Components

    These provide software abstractions for basic device functionalities. They are maintained in the main Arm::CMSIS pack within the arm-software/cmsis_6 repository.

    • CMSIS-Core: Standardized access to Arm Cortex processor cores.
    • CMSIS-Driver: Generic peripheral driver interfaces for middleware.
    • CMSIS-RTOS2: Common API for real-time operating systems.

    CMSIS Extended Software Components

    These implement specific functionalities optimized for Arm processors and are delivered as standalone CMSIS-Packs from separate repositories.

    • CMSIS-DSP: Optimized compute functions for embedded systems.
    • CMSIS-NN: Efficient and performant neural network kernels.
    • CMSIS-View: Event Recorder and Component Viewer technology.
    • CMSIS-Compiler: Retarget I/O functions of the standard C run-time library.

    CMSIS Tools

    Utilities for software development workflows.

    • CMSIS-Toolbox: Command-line tools for working with software packs (uses CMake backend).
    • CMSIS Solution: VS Code extension for managing CMSIS solutions.
    • CMSIS Debugger: VS Code extension for debugging Arm Cortex-M devices.
    • CMSIS-Stream: Tools for optimizing DSP/ML block data streams.
    • CMSIS-DAP: Firmware for debug units interfacing to CoreSight Debug Access Ports.
    • CMSIS-Zone: Methods to describe and partition system resources (processors, memory, peripherals).

    CMSIS Specifications

    • CMSIS-Pack: The delivery mechanism for software components and device/board support.
    • CMSIS-SVD: Peripheral description of a device for debug views.

  8. What is CMSIS-DSP and what does it provide?

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    CMSIS-DSP is an open-source software library providing optimized compute processing functions for Arm Cortex-M and Cortex-A processors. It is designed for embedded systems and supports operations on 8-bit integers, 16-bit integers, 32-bit integers, and 32-bit floating-point values.

    Key compute categories include:

    • Basic mathematics: Real, complex, quaternion, linear algebra, and fast math functions.
    • DSP: Filtering algorithms.
    • Transforms: FFT, MFCC, and DCT.
    • Statistics: Statistical analysis functions.
    • Classical ML: Support Vector Machines (SVM), distance functions for clustering, and more.

    For performance, the library provides vectorized versions of most algorithms for Arm Helium Technology and vectorized versions of most f32 (32-bit floating-point) algorithms for Arm Neon Technology.

  9. Overview of CMSIS-Driver

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    CMSIS-Driver provides generic, standardized driver interfaces for peripherals commonly used in embedded systems with Arm® Cortex® processors.

    Its primary purpose is to decouple user applications and middleware (such as communication stacks, file systems, or GUIs) from specific microcontroller hardware. By using these generic APIs, developers achieve better code reuse and simpler integration across different hardware ecosystems. The API is designed to be independent of any specific RTOS, making it highly portable.

  10. Overview of CMSIS-RTOS2 Services

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    CMSIS-RTOS2 provides a standardized API for common RTOS services, ensuring software reusability across different RTOS implementations. The supported services include:

    • Kernel Control: System information and RTOS kernel management.
    • Thread Management: Defining, creating, and controlling RTOS threads (tasks).
    • Time Delays: Controlling time delays and waiting for events.
    • Timer Management: Triggering function execution via timers.
    • Communication:
      • Thread Flags: Indicating specific conditions to a thread.
      • Event Flags: Indicating events to a thread or ISR.
      • Messages: Buffered communication sent to threads or ISRs via queues.
    • Synchronization: Mutex and Semaphore management.

  11. What is CMSIS?

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    CMSIS (Common Microcontroller Software Interface Standard) is a standardized set of APIs, software components, tools, and workflows designed for microcontroller developers. Its primary goals are to:

    • Simplify software re-use across different microcontrollers.
    • Reduce the learning curve for developers.
    • Speed up project build and debug processes.
    • Reduce time to market for new applications.

  12. Key features of CMSIS-DAP

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    CMSIS-DAP provides several capabilities for debugging Arm Cortex-A/R/M architectures:

    • Standardized Interface: Provides a consistent interface for many standard debuggers.
    • Physical Interfaces: Supports 5-pin JTAG or 2-pin Serial Wire Debug (SWD).
    • Multi-core Support: Enables debugging of devices with multiple cores.
    • Trace & Output: Supports Serial Wire Output (SWO) for Cortex-M devices.
    • USB Connectivity: Uses USB bulk transfers to avoid the need for driver installation on the host PC.
    • Performance: Supports time-critical JTAG or SWD command execution.
    • Time Measurement: Supports Test Domain Timer for time measurement via the debug unit.
    • Communication: Supports a UART communication port, which can be routed to a USB COM Port (optional) or handled via native CMSIS-DAP commands.