TMC-API Hardware Abstraction Layer

The TMC5160 UART protocol uses an 8-bit CRC calculated via a 256-byte table: tmcCRCTable_Poly7Reflected[256].

Because this table is identical across various Trinamic chips (e.g., TMC2209), you can save memory in multi-chip projects by substituting the local table with a single shared instance instead of having redundant copies in every driver.

To enable communication via I2C, you must implement a Hardware Abstraction Layer (HAL) wrapper function that connects the TMC-API to your specific hardware drivers.

Required Callback:

• tmc5222_readWriteI2C(): This function is called by the API's internal bus-specific functions (readRegisterI2C or writeRegisterI2C) after they have constructed the necessary datagram. Your implementation must perform the actual hardware-level I2C read or write operation.

Call Hierarchy:

1. User calls tmc5222_readRegister or tmc5222_writeRegister with an icID.
2. API calls bus-specific functions (readRegisterI2C or writeRegisterI2C).
3. Bus-specific functions construct the datagram and call the tmc5222_readWriteI2C callback.
4. tmc5222_readWriteI2C executes the hardware-specific I2C transaction.

To save program memory, you can use the TMC_API_EXTERNAL_CRC_TABLE option to share CRC tables across multiple Trinamic chips in the same project. The TMC9660 uses:

• An 8-bit table (tmcCRCTable_Poly7Reflected[256]) for UART communication.
• A 32-bit table (tmcCRCTable_Poly104C11DB7Reflected[256]) for addon uploading.

The TMC-API uses a hierarchical call structure to abstract register access from the physical SPI bus:

1. User Level: Call tmc4361A_readRegister or tmc4361A_writeRegister using an icID.
2. Bus Logic Level: These functions call bus-specific functions (readRegisterSPI or writeRegisterSPI) which construct the necessary SPI datagrams.
3. Callback Level: The bus-specific functions call the user-implemented tmc4361A_readWriteSPI() callback.
4. Hardware Level: The callback executes the actual hardware-specific SPI peripheral commands.

The TMC-API uses a layered approach to access the MAX22216 via SPI:

1. API Layer: The user calls max22216_readRegister or max22216_writeRegister.
2. Bus Logic Layer: These functions identify the active bus and call bus-specific functions (e.g., readRegisterSPI or writeRegisterSPI).
3. Datagram Layer: The bus-specific functions construct the required SPI datagram.
4. Callback Layer: The datagram is passed to the user-implemented max22216_readWriteSPI() callback, which performs the physical SPI transaction.

The TMC2224 UART protocol uses an 8-bit CRC calculated via a 256-byte table: tmcCRCTable_Poly7Reflected[256].

Since this table is identical across multiple Trinamic chips (such as the TMC2209), you can save memory in multi-chip projects by substituting the local table with a single shared instance instead of having redundant copies for every driver included in your project.

The TMC-API uses a layered approach to abstract hardware communication. The flow for a register access is as follows:

1. API Layer: The user calls tmc5262_readRegister or tmc5262_writeRegister using an icID.
2. Bus Layer: These functions call bus-specific functions (e.g., readRegisterSPI or writeRegisterSPI).
3. Datagram Layer: The bus-specific functions construct the necessary SPI datagram.
4. Callback Layer: The API calls the user-implemented tmc5262_readWriteSPI() callback.
5. Hardware Layer: The callback executes the actual hardware-specific SPI read/write operations.

The TMC2300 UART protocol uses an 8-bit CRC calculated via a 256-byte table: tmcCRCTable_Poly7Reflected[256].

Because this table is identical across multiple Trinamic chips (such as the TMC2209), you can save memory in multi-chip projects by substituting the local table with a single shared instance instead of having redundant copies in every chip's driver.

The MAX22215 register access follows a layered hierarchy to decouple the API logic from the physical hardware:

1. API Layer: User calls max22215_readRegister or max22215_writeRegister providing an icID.
2. Bus Logic Layer: The API identifies the active bus and calls bus-specific functions like readRegisterI2C or writeRegisterI2C. These functions handle datagram construction.
3. Callback Layer: The bus-specific functions call the user-implemented max22215_readWriteI2C callback.
4. Hardware Layer: The callback executes the actual hardware-specific I2C transaction.

The TMC-API uses a layered approach to access registers via SPI:

1. API Layer: The user calls tmc4671_readRegister or tmc4671_writeRegister providing an icID.
2. Bus Layer: These functions identify the active bus and call bus-specific functions like readRegisterSPI or writeRegisterSPI.
3. Protocol Layer: The bus-specific functions construct the SPI datagram and call the callback tmc4671_readWriteSPI.
4. Hardware Layer: The user-implemented tmc4671_readWriteSPI performs the physical SPI transaction and manages the CSN pin.