SystemC Reference Implementation

repository·main·Indexed 20 days ago

https://github.com/accellera-official/systemc

An ANSI C++ class library used for system-level design, modeling, and verification, bridging the gap between hardware and software. Developed by the Accellera Systems Initiative, it serves as a standard for architectural exploration, performance modeling, and high-level synthesis, following the IEEE Std. 1666-2023 standard.

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What's inside SystemC

  1. Overview of the SystemC Class Library

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    SystemC is an ANSI C++ class library designed for system-level modeling and verification, spanning both hardware and software. It is used for tasks such as architectural exploration, performance modeling, functional verification, and high-level synthesis.

    This repository provides the reference implementation of SystemC, developed by the Accellera Systems Initiative. While this implementation follows the language semantics, the IEEE Std. 1666-2023 standard is the definitive authority in the event of discrepancies.

  2. Overview of TLM-2.0 standard utilities

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    The tlm_utils directory provides ease-of-use and convenience implementations for the TLM-2.0 interoperability standard. All objects in this directory are contained within the tlm_util namespace.

    Note on usage: There is no single tlm_utils.h header file. To avoid unnecessary dependencies, you must include only the specific header files required for the utility you are using (e.g., #include <tlm_utils/simple_initiator_socket.h>).

  3. Explore TLM-2.0 example subdirectories

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    The examples/tlm/ directory contains various TLM-2.0 usage patterns and configurations. Each example includes documentation in the form of PowerPoint slides located in its respective docs/ subdirectory.

    Available Example Categories:

    • Phase-based modeling: at_1_phase/, at_2_phase/, at_4_phase/
    • Loosely Timed (LT) modeling: lt/, lt_dmi/, lt_extension_mandatory/, lt_temporal_decouple/, lt_mixed_endian/
    • Advanced/Mixed scenarios: at_extension_optional/, at_mixed_targets/, at_ooo/
    • Build configurations: build-msvc/, build-unix/, common/
  4. Overview of TLM-1.0 Analysis interfaces

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    The tlm_analysis subdirectory contains analysis interfaces, ports, and FIFOs. While these were not part of the original TLM-1.0 release, they are grouped with TLM-1.0 in this version. Key components include:

    • tlm_analysis_port: An analysis port for broadcasting data.
    • tlm_analysis_fifo: A FIFO specifically for analysis data.
    • tlm_analysis_if: Defines tlm_analysis_if and tlm_delayed_analysis_if.
    • tlm_write_if: Defines tlm_write_if and tlm_delayed_write_if.
    • tlm_analysis_triple: A specialized analysis structure.
  5. Use the SimpleBus model for TLM simulations

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    The SimpleBus is a bus model designed for TLM (Transaction Level Modeling) simulations. It provides flexibility by allowing users to switch between Loosely Timed (LT) and Approximately Timed (AT) modes at runtime, provided there are no pending transactions during the switch.

    Key Features

    • Dual Mode Support: Switchable between LT and AT modes.
    • Transaction Handling: Supports an unlimited number of pending transactions (targets must support multiple transactions if they return false to nb_transport_req).
    • Extended Support: Includes support for Direct Memory Interface (DMI) and debug transactions.

    Operating Modes

    Loosely Timed (LT) Mode

    In LT mode, the bus acts as a simple forwarder:

    • It forwards nb_transport calls directly to initiators and targets.
    • It enforces a constraint where only one active request/response phase can occur at a time.

    Approximately Timed (AT) Mode

    In AT mode, the bus provides more realistic timing behavior:

    • Incoming transactions are placed into a queue.
    • The AT protocol is executed within a dedicated SC_THREAD.
    • Targets are notified immediately upon the completion of a transaction using timing annotations. This ensures that initiators can safely reuse transaction objects, as the target uses the transaction pointer for identification.
  6. Use sc_export to expose interfaces through module hierarchies

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    The sc_export class allows you to export an interface through the module hierarchy. It makes an interface—which is already bound to a channel located somewhere within the module—available to the outside of that module. If a module contains an sc_export instance, it implies that a channel is already bound to that export within the module's hierarchy.
  7. Understand the SystemC/TLM versioning scheme

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    The SystemC/TLM reference implementation follows the IEEE Std. 1666-2023 scheme based on Major.Minor.Patch numbers. Note that no compatibility guarantees are attached to these version numbers to allow flexibility across different implementations.

    Versioning Criteria

    • Major version: Updated for IEEE Standard 1666 updates or major new language features.
    • Minor version: Updated for new Accellera standard releases or significant language extension proposals.
    • Patch version: Updated for minor API changes.
    • SYSTEMC_VERSION macro: Updated after every pull-request merge using ISO8601 format (YYYYMMDD).

    Component Versioning

    SystemC and TLM versions are incremented separately:

    • SystemC: Managed in src/sysc/kernel/sc_ver.h
    • TLM: Managed in src/tlm_core/tlm_2/tlm_version.h

    Note: Changes affecting only documentation, examples, or the build system do not trigger a version change.

  8. Understand sign and zero extension rules for SystemC data types

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    SystemC enforces specific extension rules when converting between data types of different widths (e.g., using to_XXXX() methods or implicit conversions). The behavior depends on whether the source type is classified as signed or unsigned:

    • Sign Extension: For signed types, the upper bit (sign bit) is copied to fill the new width.
    • Zero Extension: For unsigned types, a zero bit is used to fill the new width.

    Signed Types

    These types perform sign extension:

    • sc_bigint
    • sc_signed
    • sc_int
    • sc_int_base
    • C++ signed integer types (e.g., int, long long)

    Unsigned Types

    These types perform zero extension:

    • sc_biguint
    • sc_unsigned
    • sc_uint
    • sc_uint_base
    • sc_bv
    • sc_bv_base
    • sc_lv
    • sc_lv_base
    • sc_signed_subref / sc_signed_subref_r
    • sc_unsigned_subref / sc_unsigned_subref_r
    • sc_int_subref / sc_int_subref_r
    • sc_uint_subref / sc_uint_subref_r
    • C++ unsigned integer types (e.g., unsigned int, unsigned long)
  9. Override report configuration with force() and suppress()

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    The force() and suppress() methods provide a way to temporarily override the global sc_report_handler configuration.

    • force(actions): Forces specific actions to be taken for subsequent reports, regardless of the current configuration. These override any settings in suppress().
    • suppress(actions): Prevents specific actions from being taken for subsequent reports.
    • force() / suppress() (no arguments): Restores the default behavior by clearing previous calls to force or suppress.

    Example Scenario: If you are in a code block that is not C++ exception-safe, you can use suppress(SC_THROW) to prevent reports from throwing exceptions, and then call suppress() to restore normal behavior once the block is exited.

    // Force all reports to be logged during a specific debug section
    sc_report_handler::force(SC_LOG);
    // ... perform operations ...
    sc_report_handler::force(); // Restore default
  10. Understand the SystemC repository structure

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    The SystemC reference implementation is maintained across two primary repositories:

    • Public Repository (https://github.com/accellera-official/systemc): Contains the latest development version, including approved bug fixes and features. Note that the main branch may differ from the latest stable release or tags.
    • Private Repository (https://github.com/OSCI-WG/systemc): Accessible to Accellera SystemC Language Working Group (LWG) members. It contains features and enhancements currently under development by the LWG that are not yet in the public repository.